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| NTD110N02R Power MOSFET 24 V, 110 A, N-Channel DPAK Features * * * * * * Planar HD3e Process for Fast Switching Performance Low RDS(on) to Minimize Conduction Loss Low Ciss to Minimize Driver Loss Low Gate Charge Optimized for High Side Switching Requirements in High-Efficiency DC-DC Converters Pb-Free Packages are Available http://onsemi.com V(BR)DSS 24 V RDS(on) TYP 4.1 mW @ 10 V ID MAX 110 A N-Channel D MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Drain-to-Source Voltage Gate-to-Source Voltage - Continuous Thermal Resistance - Junction-to-Case Total Power Dissipation @ TC = 25C Drain Current - Continuous @ TC = 25C, Chip - Continuous @ TC = 25C, Limited by Package - Continuous @ TA = 25C, Limited by Wires - Single Pulse (tp = 10 ms) Thermal Resistance - Junction-to-Ambient (Note 1) - Total Power Dissipation @ TA = 25C - Drain Current - Continuous @ TA = 25C Thermal Resistance - Junction-to-Ambient (Note 2) - Total Power Dissipation @ TA = 25C - Drain Current - Continuous @ TA = 25C Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = 50 Vdc, VGS = 10 Vdc, IL = 15.5 Apk, L = 1.0 mH, RG = 25 W) Maximum Lead Temperature for Soldering Purposes, (1/8 from case for 10 s) Symbol VDSS VGS RqJC PD ID ID ID ID RqJA PD ID RqJA PD ID TJ, Tstg EAS Value 24 20 1.35 110 110 110 32 110 52 2.88 17.5 100 1.5 12.5 -55 to 175 120 Unit V V C/W W A A A A C/W W A C/W W A C mJ 12 3 CASE 369AA DPAK (Surface Mount) STYLE 2 4 1 G S 4 2 3 CASE 369D DPAK (Straight Lead) STYLE 2 MARKING DIAGRAM & PIN ASSIGNMENTS 4 Drain YWW T 110N2 4 Drain YWW T 110N2 123 Gate Drain Source = Year = Work Week = Device Code Publication Order Number: NTD110N02R/D TL 260 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. When surface mounted to an FR4 board using 0.5 sq in drain pad size. 2. When surface mounted to an FR4 board using the minimum recommended pad size. 2 1 3 Drain Gate Source Y WW T110N2 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. (c) Semiconductor Components Industries, LLC, 2004 1 December, 2004 - Rev. 6 NTD110N02R ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (Note 3) (VGS = 0 V, ID = 250 mA) Positive Temperature Coefficient Zero Gate Voltage Drain Current (VDS = 20 V, VGS = 0 V) (VDS = 20 V, VGS = 0 V, TJ = 125C) Gate-Body Leakage Current (VGS = 20 V, VDS = 0 V) ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (Note 3) (VDS = VGS, ID = 250 mA) Negative Threshold Temperature Coefficient Static Drain-to-Source On-Resistance (Note 3) (VGS = 10 V, ID = 110 A) (VGS = 4.5 V, ID = 55 A) (VGS = 10 V, ID = 20 A) (VGS = 4.5 V, ID = 20 A) Forward Transconductance (VDS = 10 V, ID = 15 A) (Note 3) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (VGS = 4 5 V ID = 40 A 4.5 V, A, VDS = 10 V) (Note 3) SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (IS = 20 A, VGS = 0 V) (Note 3) (IS = 55 A, VGS = 0 V) (IS = 20 A, VGS = 0 V, TJ = 125C) (IS = 30 A, VGS = 0 V, A V dIS/dt = 100 A/ms) (Note 3) Reverse Recovery Stored Charge VSD 0.82 0.99 0.65 36.5 30 25 0.048 mC 1.2 V (VGS = 10 V, VDD = 10 V, ID = 40 A, RG = 3.0 W) td(on) tr td(off) tf QT QGS QDS 11 39 27 21 23.6 5.1 11 22 80 40 40 28 nC ns (VDS = 20 V VGS = 0 V, V, V f = 1.0 MHz) Ciss Coss Crss 2710 1105 450 3440 1670 640 pF VGS(th) 1.0 RDS(on) 4.1 5.5 3.9 5.5 gFS 44 1.5 5.0 2.0 mV/C mW V V(BR)DSS 24 IDSS 1.5 10 IGSS 100 nA 28 15 V mV/C mA Symbol Min Typ Max Unit 4.6 6.2 Mhos Reverse Recovery Time trr ta tb Qrr ns 3. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTD110N02R 175 ID, DRAIN CURRENT (AMPS) 150 125 100 75 50 25 0 0 2 4 6 8 10 V 8V 6V 210 5V 4.5 V 4.2 V 4V 3.8 V 3.6 V 3.4 V 3.2 V TJ = 25C ID, DRAIN CURRENT (AMPS) 180 150 120 90 60 30 0 10 0 2 TJ = -55C 4 6 8 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) TJ = 175C TJ = 25C VDS 10 V 3V 2.8 V 2.6 V 2.4 V VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE () RDS(on), DRAIN-TO-SOURCE RESISTANCE () Figure 2. Transfer Characteristics 0.03 ID = 110 A TJ = 25C 0.02 0.014 TJ = 25C 0.012 0.01 0.008 VGS = 4.5 V 0.006 0.004 VGS = 10 V 0.002 0 20 40 60 80 100 120 140 160 180 200 220 240 ID, DRAIN CURRENT (AMPS) 0.01 0 2 4 6 8 10 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 3. On-Resistance versus Gate-to-Source Voltage Figure 4. On-Resistance versus Drain Current and Gate Voltage RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -50 ID = 55 A VGS = 10 V 100,000 VGS = 0 V IDSS, LEAKAGE (nA) 10,000 TJ = 175C 1000 100 TJ = 100C 10 -25 0 25 50 75 100 125 150 175 0 5.0 10 15 20 25 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current versus Voltage http://onsemi.com 3 NTD110N02R VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 5000 Ciss 5 QT 4 VGS 3 QGS VDS QDS 12 16 20 VDS = 0 V VGS = 0 V TJ = 25C C, CAPACITANCE (pF) 4000 3000 Ciss 2000 Crss 1000 0 10 5 VGS 0 VDS 5 10 15 Coss Crss 20 2 8 1 0 0 5 10 15 ID = 40 A TJ = 25C 20 4 0 25 Qg, TOTAL GATE CHARGE (nC) GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation Figure 8. Gate-to-Source and Drain-to-Source Voltage versus Total Charge 120 1000 td(off) tf tr IS, SOURCE CURRENT (AMPS) VDS = 10 V ID = 55 A VGS = 10 V t, TIME (ns) 100 100 80 60 40 20 0 0.4 VGS = 0 V TJ = 25C 10 td(on) 1 1 10 RG, GATE RESISTANCE () 100 0.6 0.8 1.0 1.2 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance 1000 ID, DRAIN CURRENT (AMPS) VGS = 20 V SINGLE PULSE TC = 25C 100 Figure 10. Diode Forward Voltage versus Current 1 ms 10 ms 10 RDS(on) Limit Thermal Limit Package Limit 0.1 1.0 10 dc 1.0 100 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 NTD110N02R 1.0 D = 0.5 r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 0.2 0.1 0.1 0.05 0.02 0.01 0.01 0.00001 Single Pulse 0.0001 0.001 0.01 t, TIME (s) 0.1 1.0 10 Figure 12. Thermal Response http://onsemi.com 5 NTD110N02R ORDERING INFORMATION Device NTD110N02R NTD110N02RG NTD110N02R-001 NTD110N02R-001G NTD110N02RT4 NTD110N02RT4G Package DPAK DPAK (Pb-Free) DPAK (Straight Lead) DPAK (Straight Lead) (Pb-Free) DPAK DPAK (Pb-Free) Shipping 75 Units/Rail 75 Units/Rail 75 Units/Rail 75 Units/Rail 2500 Tape & Reel 2500 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 NTD110N02R PACKAGE DIMENSIONS DPAK CASE 369AA-01 ISSUE O -T- B V R 4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.033 0.045 0.018 0.023 0.090 BSC 0.180 0.215 0.025 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.88 0.46 0.61 0.83 1.14 0.46 0.58 2.29 BSC 4.57 5.45 0.63 1.01 0.51 --- 0.89 1.27 3.93 --- C E A S 1 2 3 Z U F L D 2 PL J DIM A B C D E F J L R S U V Z 0.13 (0.005) M T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 NTD110N02R PACKAGE DIMENSIONS DPAK CASE 369D-01 ISSUE O B V R 4 C E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- Z A 3 S -T- SEATING PLANE 1 2 K F D G 3 PL J H 0.13 (0.005) M DIM A B C D E F G H J K R S V Z T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 8 NTD110N02R/D |
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